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lt6210/lt6211 1 62101fc frequency (mhz) gain at lt6210 output (db) gain at v out (db) 9 6 3 0 ?3 ?6 3 0 ?3 ?6 ?9 ?12 0.1 10 100 1000 6210 ta01b 1 v s = 5v a v = 2 t a = 25c v out = 100mv p-p i s = 300a i s = 3ma i s = 6ma ? + lt6210 r set 75 75 cable r f r g 75 6210 ta01 v out 5v ?5v 6 3 v in 4 1 5 2 r f 887 1.1k 11k r load 150 150 1k i s 6ma 3ma 300a r set 20k 56k 1m r g 887 1.1k 11k typical a pplica t ion descrip t ion single/dual programmable supply current, r-r output, current feedback amplifers the lt ? 6210/lt6211 are single/dual current feedback amplifers with externally programmable supply current and bandwidth ranging from 10mhz at 300a per ampli- fer to 200mhz at 6ma per amplifer. they feature a low distortion rail-to-rail output stage, 700v/s slew rate and a minimum output current drive of 75ma. the lt6210/lt6211 operate on supplies as low as a single 3v and up to either 12v or 6v. the i set pin allows for the optimization of quiescent current for specifc bandwidth, distortion or slew rate requirements. regardless of supply voltage, the supply current is programmable from just 300a to 6ma per amplifer with an external resistor or current source. the lt6210 is available in the low profle (1mm) 6-lead tsot-23 package. the lt6211 is available in the 10-lead msop and the 3mm 3mm 0.8mm dfn packages. l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks and c-load and thinsot are trademarks of linear technology corporation. all other trademarks are the property of their respective owners. fea t ures a pplica t ions n programmable supply current and bandwidth: 10mhz at 300a per amplifer up to 200mhz at 6ma per amplifer n rail-to-rail output: 0.05v to 2.85v on 3v single supply n high slew rate: 700v /s n high output drive: 75ma minimum output current n c-load? op amp drives all capacitive loads n low distortion: C70db hd2 at 1mhz 2v p-p C75db hd3 at 1mhz 2v p-p n fast settling: 20ns 0.1% settling for 2v step n excellent video performance into 150 load: differential gain of 0.20%, differential phase of 0.10 n wide supply range: 3v to 12v single supply 1.5v to 6v dual supplies n small size: low profle (1mm) 6-lead thinsot ?, 3mm 3mm 0.8mm dfn and 10-lead msop packages n buffers n video amplifers n cable drivers n mobile communication n low power/battery applications line driver confguration for various supply currents small signal response vs supply current
lt6210/lt6211 2 62101fc a bsolu t e maxi m u m r a t ings total supply voltage (v + to v C ) .............................. 13.2v input current (note 8) ..................................... 10ma output current ................................................. 80ma output short-cir cuit duration (note 2) ............ indefnite operating t emperature range (note 3).... C40c to 85c specifed temperature range (note 4) .... C40c to 85c (note 1) top view dd package 10-lead (3mm 3mm) plastic dfn 10 11 9 6 7 8 4 5 3 2 1 v + out b ?in b +in b i set b out a ?in a +in a i set a v ? + ? + ? t jmax = 150c, ja = 43c/w (note 5) exposed pad (pin 11) connected to v C (pcb connection optional) 1 2 3 4 5 out a ?in a +in a i set a v ? 10 9 8 7 6 v + out b ?in b +in b i set b top view ms package 10-lead plastic msop + ? + ? t jmax = 150c, ja = 120c/w (note 5) out 1 v ? 2 +in 3 6 v + 5 i set 4 ?in top view s6 package 6-lead plastic tsot-23 + ? t jmax = 150c, ja = 230c/w (note 5) p in c on f igura t ion or d er in f or m a t ion lead free finish tape and reel part marking* package description specified temperature range lt6211cdd#pbf lt6211cdd#trpbf lbcd 10-lead (3mm 3mm) plastic dfn 0c to 70c lt6211idd#pbf lt6211idd#trpbf lbcd 10-lead (3mm 3mm) plastic dfn C40c to 85c lt6211cms#pbf lt6211cms#trpbf ltbbn 10-lead plastic msop 0c to 70c lt6211ims#pbf lt6211ims#trpbf ltbbp 10-lead plastic msop C40c to 85c lt6210cs6#pbf lt6210cs6#trpbf lta 3 6-lead plastic tsot-23 0c to 70c lt6210is6#pbf lt6210is6#trpbf lta 3 6-lead plastic tsot-23 C40c to 85c lead based finish tape and reel part marking* package description specified temperature range lt6211cdd lt6211cdd#tr lbcd 10-lead (3mm 3mm) plastic dfn 0c to 70c lt6211idd lt6211idd#tr lbcd 10-lead (3mm 3mm) plastic dfn C40c to 85c lt6211cms lt6211cms#tr ltbbn 10-lead plastic msop 0c to 70c lt6211ims lt6211ims#tr ltbbp 10-lead plastic msop C40c to 85c lt6210cs6 lt6210cs6#tr lta 3 6-lead plastic tsot-23 0c to 70c lt6210is6 lt6210is6#tr lta 3 6-lead plastic tsot-23 C40c to 85c consult ltc marketing for parts specifed with wider operating temperature ranges. *the temperature grade is identifed by a label on the shipping container. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifcations, go to: http://www.linear.com/tapeandreel/ junction temperature (note 5) ............................. 150c junction temperature (dd package) ..................... 150c storage t emperature range .................. C65c to 150c storage t emperature range (dd package) ..................................... C65c to 150c lead temperature (soldering, 10 sec) .................. 300c
lt6210/lt6211 3 62101fc e lec t rical c harac t eris t ics (i s = 6ma per amplifer) the l denotes the specifcations which apply over the specifed operating temperature range, otherwise specifcations are at t a = 25c. for v + = 5v, v C = C5v: r set = 20k to ground, a v = +2, r f = r g = 887, r l = 150; for v + = 3v, v C = 0v: r set = 0 to v C , a v = +2, r f = 887, r g = 887 to 1.5v, r l = 150 to 1.5v unless otherwise specifed. symbol parameter conditions v + = 5v, v C = C5v, i s = 6ma v + = 3v, v C = 0v, i s = 6ma units min typ max min typ max v os input offset voltage l C1 6 9 C1 6.5 10 mv mv i in + noninverting input current l C3.5 7 9 C3 6.5 8 a a i in C inverting input current l C13.5 39 55 2.5 25 40 a a en input noise voltage density f = 1khz, r f = 887, r g = 46.4, r s = 0 6.5 6.5 nv/ hz +i n input noise current density f = 1khz 4.5 4.5 pa/hz Ci n input noise current density f = 1khz 25 25 pa/hz r in + noninverting input resistance v in = v + C 1.2v to v C + 1.2v l 0.5 2 0.3 1.7 m c in + noninverting input capacitance f = 100khz 2 2 pf v inh input voltage range, high (note 10) l 3.8 4.2 1.8 2.2 v v inl input voltage range, low (note 10) l C4.2 C3.8 0.8 1.2 v v outh output voltage swing, high r l = 1k (note 11) r l = 150 (note 11) r l = 150 (note 11) l 4.4 4.2 4.8 4.6 2.65 2.6 2.85 2.75 v v v v outl output voltage swing, low r l = 1k (note 11) r l = 150 (note 11) r l = 150 (note 11) l C4.95 C4.8 C4.55 C4.4 0.05 0.1 0.3 0.35 v v v cmrr common mode rejection ratio v in = v + C 1.2v to v C + 1.2v l 46 43 50 46 db db Ci cmrr inverting input current common mode rejection v in = v + C 1.2v to v C + 1.2v l 0.15 1.5 2 0.2 a/v a/v psrr power supply rejection ratio v s = 1.5v to 6v (note 6) l 60 85 60 85 db Ci psrr inverting input current power supply rejection v s = 1.5v to 6v (note 6) l 2 7 8 2 7 8 a/v a/v i s supply current per amplifer l 6 8.5 10 5.8 8.3 9 ma ma
lt6210/lt6211 4 62101fc e lec t rical c harac t eris t ics (i s = 6ma per amplifer) the l denotes the specifcations which apply over the specifed operating temperature range, otherwise specifcations are at t a = 25c. for v + = 5v, v C = C5v: r set = 20k to ground, a v = +2, r f = r g = 887, r l = 150; for v + = 3v, v C = 0v: r set = 0 to v C , a v = +2, r f = 887, r g = 887 to 1.5v, r l = 150 to 1.5v unless otherwise specifed. symbol parameter conditions v + = 5v, v C = C5v, i s = 6ma v + = 3v, v C = 0v, i s = 6ma units min typ max min typ max i out maximum output current r l = 0 (notes 7, 11) l 75 45 ma r ol transimpedance, ?v out /?i in C v out = v + C 1.2v to v C + 1.2v 65 115 65 115 k sr slew rate (note 8) 500 700 200 v/s t pd propagation delay 50% v in to 50% v out , 100mv p-p , larger of t pd + , t pd C 1.5 2.4 ns bw C3db bandwidth <1db peaking, a v = 1 200 120 mhz t s settling time to 0.1% of v final , v step = 2v 20 25 ns t f , t r small-signal rise and fall time 10% to 90%, v out = 100mv p-p 2 3.5 ns dg differential gain (note 9) 0.20 0.35 % dp differential phase (note 9) 0.10 0.20 deg hd2 2nd harmonic distortion f = 1mhz, v out = 2v p-p C70 C65 dbc hd3 3rd harmonic distortion f = 1mhz, v out = 2v p-p C75 C75 dbc (i s = 3ma per amplifer) the l denotes the specifcations which apply over the specifed operating temperature range, otherwise specifcations are at t a = 25c. for v + = 5v, v C = C5v: r set = 56k to ground, a v = +2, r f = r g = 1.1k, r l = 150; for v + = 3v, v C = 0v: r set = 10k to v C , a v = +2, r f = 1.27k, r g = 1.27k to 1.5v, r l = 150 to 1.5v unless otherwise specifed. symbol parameter conditions v + = 5v, v C = C5v, i s = 3ma v + = 3v, v C = 0v, i s = 3ma units min typ max min typ max v os input offset voltage l C1 5.5 8.5 C1.5 5.5 8.5 mv mv i in + noninverting input current l C1.5 5 7 C1.5 5 7 a a i in C inverting input current l C12 36 52 C3 15 20 a a en input noise voltage density f = 1khz, r f = 1.1k, r g = 57.6, r s = 0 7 7 nv/ hz +i n input noise current density f = 1khz 1.5 1.5 pa/hz Ci n input noise current density f = 1khz 15 15 pa/hz r in + noninverting input resistance v in = v + C 1.2v to v C + 1.2v l 0.5 3 1 2.5 m c in + noninverting input capacitance f = 100khz 2 2 pf v inh input voltage range, high (note 10) l 3.8 4.1 1.8 2.1 v v inl input voltage range, low (note 10) l C4.1 C3.8 0.9 1.2 v v outh output voltage swing, high r l = 1k (note 11) r l = 150 (note 11) r l = 150 (note 11) l 4.3 4.1 4.8 4.6 2.6 2.55 2.9 2.8 v v v v outl output voltage swing, low r l = 1k (note 11) r l = 150 (note 11) r l = 150 (note 11) l C4.95 C4.8 C4.55 C4.4 0.05 0.1 0.3 0.35 v v v cmrr common mode rejection ratio v in = v + C 1.2v to v C + 1.2v l 46 43 50 46 db db Ci cmrr inverting input current common mode rejection v in = v + C 1.2v to v C + 1.2v l 0.3 1.5 2 0.4 a/v a/v
lt6210/lt6211 5 62101fc e lec t rical c harac t eris t ics (i s = 3ma per amplifer) the l denotes the specifcations which apply over the specifed operating temperature range, otherwise specifcations are at t a = 25c. for v + = 5v, v C = C5v: r set = 56k to ground, a v = +2, r f = r g = 1.1k, r l = 150; for v + = 3v, v C = 0v: r set = 10k to v C , a v = +2, r f = 1.27k, r g = 1.27k to 1.5v, r l = 150 to 1.5v unless otherwise specifed. symbol parameter conditions v + = 5v, v C = C5v, i s = 3ma v + = 3v, v C = 0v, i s = 3ma units min typ max min typ max psrr power supply rejection ratio v s = 1.5v to 6v (note 6) l 60 85 60 85 db Ci psrr inverting input current power supply rejection v s = 1.5v to 6v (note 6) l 1.5 7 8 1.5 7 8 a/v a/v i s supply current per amplifer l 3 4.1 4.55 3 4.1 4.4 ma ma i out maximum output current r l = 0 (notes 7, 11) l 70 45 ma r ol transimpedance, ?v out /?i in C v out = v + C 1.2v to v C + 1.2v 65 120 65 120 k sr slew rate (note 8) 450 600 150 v/s t pd propagation delay 50% v in to 50% v out , 100mv p-p , larger of t pd + , t pd C 3.1 4.7 ns bw C3db bandwidth <1db peaking, a v = 1 100 70 mhz t s settling time to 0.1% of v final , v step = 2v 20 25 ns t f , t r small-signal rise and fall time 10% to 90%, v out = 100mv p-p 3 5.6 ns dg differential gain (note 9) 0.35 0.42 % dp differential phase (note 9) 0.30 0.44 deg hd2 2nd harmonic distortion f = 1mhz, v out = 2v p-p C65 C60 dbc hd3 3rd harmonic distortion f = 1mhz, v out = 2v p-p C65 C65 dbc (i s = 300a per amplifer) the l denotes the specifcations which apply over the specifed operating temperature range, otherwise specifcations are at t a = 25c. for v + = 5v, v C = C5v: r set = 1m to ground, a v = +2, r f = r g = 11k, r l = 1k; for v + = 3v, v C = 0v: r set = 270k to v C , a v = +2, r f = 9.31k, r g = 9.31k to 1.5v, r l = 1k to 1.5v unless otherwise specifed. symbol parameter conditions v + = 5v, v C = C5v, i s = 300a v + = 3v, v C = 0v, i s = 300a units min typ max min typ max v os input offset voltage l C1 4.5 8 C1.5 4.5 8 mv mv i in + noninverting input current l 0.2 1 2 0.2 1 1.5 a a i in C inverting input current l C3 8.5 11 C0.5 3 4.5 a a en input noise voltage density f = 1khz, r f = 13k, r g = 681, r s = 0 13.5 13.5 nv/ hz +i n input noise current density f = 1khz 0.75 0.75 pa/hz Ci n input noise current density f = 1khz 5 5 pa/hz r in + noninverting input resistance v in = v + C 1.2v to v C + 1.2v (note 8) l 1 25 1 15 m c in + noninverting input capacitance f = 100khz 2 2 pf v inh input voltage range, high (note 10) l 3.8 4.1 1.8 2.1 v v inl input voltage range, low (note 10) l C4.1 C3.8 0.9 1.2 v v outh output voltage swing, high r l = 1k (note 11) l 4.75 4.7 4.85 2.75 2.7 2.85 v v v outl output voltage swing, low r l = 1k (note 11) l C4.95 C4.85 C4.8 0.05 0.15 0.2 v v
lt6210/lt6211 6 62101fc note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: as long as output current and junction temperature are kept below the absolute maximum ratings, no damage to the part will occur. depending on the supply voltage, a heat sink may be required. note 3: the lt6210c/lt6211c is guaranteed functional over the operating temperature range of C40c to 85c. note 4: the lt6210c/lt6211c is guaranteed to meet specifed performance from 0c to 70c. the lt6210c/lt6211c is designed, characterized and expected to meet specifed performance from C40c and 85c but is not tested or qa sampled at these temperatures. the lt6210i/ lt6211i is guaranteed to meet specifed performance from C40c to 85c. note 5: the lt6210 with no metal connected to the v C pin has a ja of 230c/w, however, thermal resistances vary depending upon the amount of pc board metal attached to pin 2 of the device. with the lt6210 mounted on a 2500mm 2 3/32" fr-4 board covered with 2oz copper on both sides and with just 20mm 2 of copper attached to pin 2, ja drops to 160c/w. thermal performance can be improved even further by using a 4-layer board or by attaching more metal area to pin 2. thermal resistance of the lt6211 in msop-10 is specifed for a 2500mm 2 3/32" fr-4 board covered with 2oz copper on both sides and with 100mm 2 of copper attached to pin 5. its performance can also be increased with additional copper much like the lt6210. to achieve the specifed ja of 43c/w for the lt6211 dfn-10, the exposed pad must be soldered to the pcb. in this package, ja will beneft e lec t rical c harac t eris t ics (i s = 300a per amplifer) the l denotes the specifcations which apply over the specifed operating temperature range, otherwise specifcations are at t a = 25c. for v + = 5v, v C = C5v: r set = 1m to ground, a v = +2, r f = r g = 11k, r l = 1k; for v + = 3v, v C = 0v: r set = 270k to v C , a v = +2, r f = 9.31k, r g = 9.31k to 1.5v, r l = 1k to 1.5v unless otherwise specifed. symbol parameter conditions v + = 5v, v C = C5v, i s = 300a v + = 3v, v C = 0v, i s = 300a units min typ max min typ max cmrr common mode rejection ratio v in = v + C 1.2v to v C + 1.2v l 46 43 50 46 db db Ci cmrr inverting input current common mode rejection v in = v + C 1.2v to v C + 1.2v l 0.15 1.5 2 0.2 a/v a/v psrr power supply rejection ratio v s = 1.5v to 6v (note 6) l 60 85 60 85 db Ci psrr inverting input current power supply rejection v s = 1.5v to 6v (note 6) l 0.4 2.2 4 0.4 2.2 4 a/v a/v i s supply current per amplifer l 0.3 0.525 0.6 0.3 0.38 0.43 ma ma i out maximum output current r l = 0 (notes 7, 11) l 30 10 ma r ol transimpedance, ?v out /?i in C v out = v + C 1.2v to v C + 1.2v 300 660 65 120 k sr slew rate (note 8) 120 170 20 v/s t pd propagation delay 50% v in to 50% v out , 100mv p-p , larger of t pd + , t pd C 30 50 ns bw C3db bandwidth <1db peaking, a v = 1 10 7.5 mhz t s settling time to 0.1% of v final , v step = 2v 200 300 ns t f , t r small-signal rise and fall time 10% to 90%, v out = 100mv p-p 40 50 ns hd2 2nd harmonic distortion f = 1mhz, v out = 2v p-p C40 CC45 dbc hd3 3rd harmonic distortion f = 1mhz, v out = 2v p-p C45 C45 dbc from increased copper area attached to the exposed pad. t j is calculated from the ambient temperature t a and the power dissipation pd according to the following formula: t j = t a + (p d ? ja ) the maximum power dissipation can be calculated by: p d(max) = (v s ? i s(max) ) + (v s /2) 2 /r load note 6: for psrr and Cipsrr testing, the current into the i set pin is constant, maintaining a consistent lt6210/lt6211 quiescent bias point. a graph of psrr vs frequency is included in the typical performance characteristics showing +psrr and Cpsrr with r set connecting i set to ground. note 7: while the lt6210 and lt6211 circuitry is capable of signifcant output current even beyond the levels specifed, sustained short- circuit current exceeding the absolute maximum rating of 80ma may permanently damage the device. note 8: this parameter is guaranteed to meet specifed performance through design and characterization. it is not production tested. note 9: differential gain and phase are measured using a tektronix tsg120yc/ntsc signal generator and a tektronix 1780r video measurement set. the resolution of this equipment is 0.1% and 0.1. five identical amplifer stages were cascaded giving an effective resolution of 0.02% and 0.02. note 10: input voltage range on 5v dual supplies is guaranteed by cmrr. on 3v single supply it is guaranteed by design and by correlation to the 5v input voltage range limits. note 11: this parameter is tested by forcing a 50mv differential voltage between the inverting and noninverting inputs.
lt6210/lt6211 7 62101fc typical ac p er f or m ance v s (v) i s (ma) per amplifer r set () a v r l () r f () r g () small-signal C3db bw, <1db peaking (mhz) small-signal 0.1db bw (mhz) 5 6 20k 1 150 1200 200 30 5 6 20k 2 150 887 887 160 30 5 6 20k C1 150 698 698 140 20 5 3 56k 1 150 1690 100 15 5 3 56k 2 150 1100 1100 100 15 5 3 56k C1 150 1200 1200 80 15 5 0.3 1m 1 1k 13.7k 10 2 5 0.3 1m 2 1k 11k 11k 10 2 5 0.3 1m C1 1k 10k 10k 10 1.8 3, 0 6 0 1 150 1100 120 20 3, 0 6 0 2 150 887 887 100 20 3, 0 6 0 C1 150 806 806 100 20 3, 0 3 10k 1 150 1540 70 15 3, 0 3 10k 2 150 1270 1270 60 15 3, 0 3 10k C1 150 1200 1200 60 15 3, 0 0.3 270k 1 1k 13k 7.5 2 3, 0 0.3 270k 2 1k 9.31k 9.31k 7 1.5 3, 0 0.3 270k C1 1k 10k 10k 7 1.5 supply current per amplifer vs temperature supply current per amplifer vs temperature supply current per amplifer vs temperature typical p er f or m ance c harac t eris t ics temperature (c) ?50 supply current (ma) 7.5 7.0 6.5 6.0 5.5 5.0 4.5 25 75 6210 g01 ?25 0 50 100 125 r l = v s = 5v r set = 20k to gnd v s = 1.5v r set = 0 to v ? temperature (c) ?50 supply current (ma) 100 6210 g02 0 50 4.00 3.75 3.50 3.25 3.00 2.75 2.50 2.25 2.00 ?25 25 75 125 r l = v s = 5v r set = 56k to gnd v s = 1.5v r set = 10k to v ? temperature (c) ?50 supply current (a) 400 380 360 340 320 300 280 260 240 220 200 0 50 75 6210 g03 ?25 25 100 125 r l = v s = 5v r set = 1m to gnd v s = 1.5v r set = 270k to v ?
lt6210/lt6211 8 62101fc typical p er f or m ance c harac t eris t ics input offset voltage vs input common mode voltage input common mode range vs temperature input common mode range vs temperature output voltage swing vs temperature output voltage swing vs temperature output voltage swing vs i load input noise spectral density (i s = 6ma per amplifer) input noise spectral density (i s = 3ma per amplifer) input noise spectral density (i s = 300a per amplifer) (supply current is measured per amplifer) frequency (khz) 0.1 1 10 100 62101go4 0.01 0.001 0.1 input noise (nv/hz or pa/hz) 1 10 100 v s = 5v r l = 150 t a = 25c ?i n +i n e n 0.1 1 10 100 0.01 0.001 0.1 input noise (nv/hz or pa/hz) 1 10 100 frequency (khz) 62101go5 v s = 5v r l = 150 t a = 25c ?i n +i n e n 0.1 1 10 100 0.01 0.001 0.1 input noise (nv/hz or pa/hz) 1 10 100 frequency (khz) 62101go6 v s = 5v r l = 1k t a = 25c ?i n +i n e n input common mode voltage (v) offset voltage (mv) 20 15 10 5 0 ?5 ?10 ?15 ?20 62101 g07 ?2 ?1?3?5 ?4 0 21 3 5 4 v s = 5v a v = 1 t a = 25c typical part i s = 6ma r f = 1200 r l = 150 i s = 3ma r f = 1690 r l = 150 i s = 300a r f = 13.7k r l = 1k temperature (c) ?50 5.0 4.5 4.0 ?4.0 ?4.5 ?5.0 25 75 62101 g08 ?25 0 50 100 125 input common mode limit (v) v s = 5v a v = 1 cmrr > 48db typical part i s = 6ma r f = 1200 r l = 150 i s = 300a r f = 13.7k r l = 1k i s = 300a r f = 13.7k r l = 1k i s = 3ma r f = 1690 r l = 150 62101 g09 temperature (c) ?50 1.5 1.0 0.5 0 ?0.5 ?1.0 ?1.5 25 75 ?25 0 50 100 125 input common mode limit (v) v s = 1.5v a v = 1 cmrr >46db typical part i s = 300a r f = 13k r l = 1k i s = 300a r f = 13k r l = 1k i s = 6ma r f = 1100 r l = 150 i s = 3ma r f = 1540 r l = 150 temperature (c) ?50 output voltage (v) 100 6210 g10 0 50 5.0 4.8 4.6 4.4 ?4.4 ?4.6 ?4.8 ?5.0 ?25 25 75 125 output low v s = 5v v cm = 0v ?v os = 50mv output high i s = 300a r l = 1k i s = 6ma r l = 1k i s = 6ma r l = 150 i s = 300a r l = 1k i s = 6ma r l = 1k i s = 6ma r l = 150 temperature (c) ?50 output voltage (v) 100 6210 g11 0 50 1.5 1.4 1.3 1.2 1.1 ?1.1 ?1.2 ?1.3 ?1.4 ?1.5 ?25 25 75 125 output low v s = 1.5v v cm = 0v ?v os = 50mv output high i s = 6ma r l = 100 i s = 300a r l = 1k i s = 6ma r l = 100 i s = 300a r l = 1k load current (ma) 0 output voltage (v) 5.0 4.8 4.6 4.4 4.2 4.0 3.8 3.6 3.4 3.2 3.0 40 50 60 70 6210 g12 10 20 30 v s = 5v v cm = 0v ?v os = 50mv t a = 25c i s = 300a i s = 3ma i s = 6ma
lt6210/lt6211 9 62101fc typical p er f or m ance c harac t eris t ics cmrr and psrr vs frequency (i s = 6ma per amplifer) cmrr and psrr vs frequency (i s = 3ma per amplifer) cmrr and psrr vs frequency (i s = 300a per amplifer) frequency response vs closed loop gain (i s = 6ma per amplifer) frequency response vs closed loop gain (i s = 3ma per amplifer) frequency response vs closed loop gain (i s = 300a per amplifer) output voltage swing vs i load output voltage swing vs i load output voltage swing vs i load (supply current is measured per amplifer) load current (ma) 0 output voltage (v) ?3.0 ?3.2 ?3.4 ?3.6 ?3.8 ?4.0 ?4.2 ?4.4 ?4.6 ?4.8 ?5.0 40 50 60 70 6210 g13 10 20 30 v s = 5v v cm = 0v ?v os = 50mv t a = 25c i s = 300a i s = 3ma i s = 6ma output voltage (v) load current (ma) 0 40 50 60 70 6210 g14 10 20 30 v s = 1.5v v cm = 0v ?v os = 50mv t a = 25c 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 i s = 300a i s = 3ma i s = 6ma output voltage (v) load current (ma) 0 40 50 60 70 6210 g15 10 20 30 v s = 1.5v v cm = 0v ?v os = 50mv t a = 25c ?0.1 ?0.3 ?0.5 ?0.7 ?0.9 ?1.1 ?1.3 ?1.5 i s = 300a i s = 3ma i s = 6ma frequency (mhz) 0.001 0.1 1 100 6210 g16 0.01 10 rejection ratio (db) 70 60 50 40 30 20 10 0 ?psrr +psrr cmrr v s = 5v r l = 150 t a = 25c frequency (mhz) 0.001 0.1 1 100 0.01 10 rejection ratio (db) 70 60 50 40 30 20 10 0 6210 g17 ?psrr +psrr cmrr v s = 5v r l = 150 t a = 25c frequency (mhz) 0.001 0.1 1 0.01 10 rejection ratio (db) 70 60 50 40 30 20 10 0 6210 g18 ?psrr +psrr cmrr v s = 5v r l = 1k t a = 25c frequency (mhz) gain (db) 9 6 3 0 ?3 ?6 0.1 10 100 1000 6210 g19 1 v s = 5v r l = 150 t a = 25c v out = 100mv p-p a v = 2 r f = r g = 887 a v = ?1 r f = r g = 698 a v = 1 r f = 1.2k frequency (mhz) gain (db) 9 6 3 0 ?3 ?6 0.1 10 100 1000 6210 g20 1 v s = 5v r l = 150 t a = 25c v out = 100mv p-p a v = 2 r f = r g = 1100 a v = ?1 r f = r g = 1200 a v = 1 r f = 1690 frequency (mhz) gain (db) 9 6 3 0 ?3 ?6 0.1 10 100 6210 g21 1 v s = 5v r l = 150 t a = 25c v out = 100mv p-p a v = 2 r f = r g = 11k a v = ?1 r f = r g = 10k a v = 1 r f = 13.7k
lt6210/lt6211 10 62101fc typical p er f or m ance c harac t eris t ics maximum undistorted output sinusoid vs frequency output impedance vs frequency lt6211 channel separation vs frequency overshoot vs capacitive load maximum capacitive load vs output series resistor maximum capacitive load vs feedback resistor 2nd and 3rd harmonic distortion vs frequency (i s = 6ma per amplifer) 2nd and 3rd harmonic distortion vs frequency (i s = 3ma per amplifer) 2nd and 3rd harmonic distortion vs frequency (i s = 300a per amplifer) (supply current is measured per amplifer) frequency (mhz) distortion (dbc) 0.01 1 10 100 6210 g22 0.1 v s = 5v r f = r g = 887 v out = 2v p-p r l = 150 t a = 25c hd2 hd3 0 ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 frequency (mhz) 0.01 1 10 100 6210 g23 0.1 distortion (dbc) 0 ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 v s = 5v r f = r g = 1.1k v out = 2v p-p r l = 150 t a = 25c hd2 hd3 frequency (mhz) 0.01 1 10 6210 g24 0.1 v s = 5v r f = r g = 11k v out = 2v p-p r l = 1k t a = 25c hd2 hd3 distortion (dbc) 0 ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 10 9 8 7 6 5 4 3 2 1 0 frequency (mhz) output voltage swing (v p-p ) 0.1 10 100 6210 g25 1 v s = 5v hd2, hd3 lt6210/lt6211 11 62101fc typical p er f or m ance c harac t eris t ics small-signal transient response (i s = 6ma per amplifer) small-signal transient response (i s = 3ma per amplifer) small-signal transient response (i s = 300a per amplifer) large-signal transient response (i s = 6ma per amplifer) large-signal transient response (i s = 3ma per amplifer) large-signal transient response (i s = 300a per amplifer) C3db small-signal bandwidth vs supply current slew rate vs supply current 1mhz 2nd and 3rd harmonic distortion vs supply current (supply current is measured per amplifer) 62101 g31 supply current per amplifier (ma) 0.1 1 ?3db bandwidth (mhz) 10 100 1000 1 10 a v = 2 v out = 100mv p-p t a = 25c v s = 1.5v v s = 5v supply current per amplifier (ma) 0.1 0 slew rate (v/s) 200 400 600 800 1 10 62101 g32 1000 100 300 500 700 900 v s = 5v a v = 2 v out = 7v p-p t a = 25c rising edge rate falling edge rate supply current per amplifier (ma) harmonic distortion (dbc) ?30 ?40 ?50 hd2 hd3 62101 g33 ?80 ?60 ?70 10 0.1 1 v s = 5v a v = 2 v out = 2v p-p t a = 25c output (50mv/div) time (10ns/div) v s = 5v v in = 25mv r f = r g = 887 r set = 20k to gnd r l = 150 62101 g34 time (10ns/div) v s = 5v v in = 25mv r f = r g = 1.1k r set = 56k to gnd r l = 150 62101 g35 output (50mv/div) time (100ns/div) v s = 5v v in = 25mv r f = r g = 11k r set = 1m to gnd r l = 1k 62101 g36 output (50mv/div) time (10ns/div) v s = 5v v in = 1.75v r f = r g = 887 r set = 20k to gnd r l = 150 62101 g37 output (2v/div) time (10ns/div) v s = 5v v in = 1.75v r f = r g = 1.1k r set = 56k to gnd r l = 150 62101 g38 output ( 2v/div) time (100ns/div) v s = 5v v in = 1.75v r f = r g = 11k r set = 1m to gnd r l = 1k 62101 g39 output (2mv/div)
lt6210/lt6211 12 62101fc a pplica t ions i n f or m a t ion setting the quiescent operating current (i set pin) the quiescent bias point of the lt6210/lt6211 is set with either an external resistor from the i set pin to a lower potential or by drawing a current out of the i set pin. however, the i set pin is not designed to function as a shutdown. the lt6211 uses two entirely independent bias networks, so while each channel can be programmed for a different supply current, neither i set pin should be left unconnected. a simplifed schematic of the internal bias - ing structure can be seen in figure 1. figure 2 illustrates the results of varying r set on 3v and 5v supplies. note that shorting the i set pin under 3v operation results in a quiescent bias of approximately 6ma. attempting to bias the lt6210/lt6211 at a current level higher than 6ma by using a smaller resistor may result in instability and decreased performance. however, internal circuitry clamps the supply current of the part at a safe level of approximately 15ma in case of accidental connection of the i set pin directly to a negative potential. input considerations the inputs of the lt6210/lt6211 are protected by back- to-back diodes. if the differential input voltage exceeds 1.4v, the input current should be limited to less than the absolute maximum ratings of 10ma. in normal opera- tion, the differential voltage between the inputs is small, so the 1.4v limit is generally not an issue. esd diodes protect both inputs, so although the part is not guaranteed to function outside the common mode range, input volt- ages that exceed a diode beyond either supply will also require current limiting to keep the input current below the absolute maximum of 10ma. feedback resistor selection the small-signal bandwidth of the lt6210/lt6211 is set by the external feedback resistors and the internal junc- tion capacitances. as a result, the bandwidth is a function of the quiescent supply current, the supply voltage, the value of the feedback resistor, the closed-loop gain and the load resistor. refer to the typical ac performance table for more information. layout and passive components as with all high speed amplifers, the lt6210/lt6211 require some attention to board layout. low esl/esr bypass capacitors should be placed directly at the positive and negative supply (0.1f ceramics are recommended). for best transient performance, additional 4.7f tantal - ums should be added. a ground plane is recommended and trace lengths should be minimized, especially on the inverting input lead. capacitance on the inverting input current feedback amplifers require resistive feedback from the output to the inverting input for stable operation. capacitance on the inverting input will cause peaking in the frequency response and overshoot in the transient response. take care to minimize the stray capacitance at the inverting input to ground and between the output and the inverting input. if signifcant capacitance is unavoid - able in a given application, an inverting gain confguration should be considered. when confgured inverting, the amplifer inputs do not slew and the effect of parasitics is greatly reduced. figure 1. internal bias setting circuitry figure 2. setting r set to control i s 6 5 v + to bias control 600 600 8k i set 6210 f01 10 1 0.1 0.01 0.1 1 10 100 1000 r set programming resistor (k) supply current per amplifier (ma) 6210 f02 v s = 5v r set to gnd v s = 3v r set to gnd t a = 25c r l =
lt6210/lt6211 13 62101fc a pplica t ions i n f or m a t ion capacitive loads the lt6210/lt6211 are stable with any capacitive load. although peaking and overshoot may result in the ac transient response, the amplifers compensation decreases bandwidth with increasing output capacitive load to ensure stability. to maintain a response with minimal peaking, the feedback resistor can be increased at the cost of bandwidth as shown in the typical performance characteristics. alternatively, a small resistor (5 to 35) can be put in series with the output to isolate the capacitive load from the amplifer output. this has the advantage that the ampli- fer bandwidth is only reduced when the capacitive load is present. the disadvantage of this technique is that the gain is a function of the load resistance. power supplies the lt6210/lt6211 will operate on single supplies from 3v to 12v and on split supplies from 1.5v to 6v. if split supplies of unequal absolute value are used, input offset voltage and inverting input current will shift from the values specifed in the electrical characteristics table. input offset voltage will shift 2mv and inverting input current will shift 0.5a for each volt of supply mismatch. slew rate unlike a traditional voltage feedback op amp, the slew rate of a current feedback amplifer is not independent of the amplifer gain confguration. in a current feedback ampli- fer, both the input stage and the output stage have slew rate limitations. in the inverting mode, and for gains of 2 or more in the noninverting mode, the signal amplitude between the input pins is small and the overall slew rate is that of the output stage. for gains less than 2 in the noninverting mode, the overall slew rate is limited by the input stage. the input slew rate of the lt6210/lt6211 on 5v supplies with an r set resistor of 20k (i s = 6ma) is approximately 600v/s and is set by internal currents and capacitances. the output slew rate is additionally con - strained by the value of the feedback resistor and internal capacitance. at a gain of 2 with 887 feedback and gain resistors, 5v supplies and the same biasing as above, the output slew rate is typically 700v/s. larger feedback resistors, lower supply voltages and lower supply current levels will all reduce slew rate. input slew rates signifcantly exceeding the output slew capability can actually decrease slew performance in a positive gain confguration; the cleanest transient response will be obtained from input signals with slew rates slower than 1000v/s. output swing and drive the output stage of the lt6210/lt6211 consists of a pair of class-ab biased common emitters that enable the output to swing rail-to-rail. since the amplifers can potentially deliver output currents well beyond the specifed minimum short-circuit current, care should be taken not to short the output of the device indefnitely. attention must be paid to keep the junction temperature of the ic below the absolute maximum rating of 150c if the output is used to drive low impedance loads. see note 5 for details. additionally, the output of the amplifer has reverse-biased esd diodes connected to each supply. if the output is forced beyond either supply, large currents will fow through these diodes. if the current is limited to 80ma or less, no damage to the part will occur.
lt6210/lt6211 14 62101fc typical a pplica t ions 3v cable driver with active termination driving back-terminated cables on single supplies usually results in very limited signal amplitude at the receiving end of the cable. however, positive feedback can be used to reduce the size of the series back termination resistor, thereby decreasing the attenuation between the series and shunt termination resistors while still maintaining controlled output impedance from the line-driving amplifer. figure 3 shows the lt6210 using this active termination scheme on a single 3v supply. the amplifer is ac-coupled and in an inverting gain confguration to maximize the input signal range. the gain from v in to the receiving end of the cable, v out , is set to C1. the effective impedance looking into the amplifer circuit from the cable is 50 throughout the usable bandwidth. the response of the cable driver with a 1mhz sinusoid is shown in figure 4. the circuit is capable of transmitting a 1.5v p-p undistorted sinusoid to the 50 termination resistor and has a full signal 1v p-p bandwidth of 50mhz. small signal C3db bandwidth extends from 1khz to 56mhz with the selected coupling capacitors. figure 3. 3v cable driver with active termination figure 4. response of circuit at 1mhz ? + lt6210 r ser 15 1% 249 1% 2k 1% 2.2f 154 1% 1.3k 1% 2k 1% r term 50 v out 6210 f03 3v 3v 6 4 3 v in 1 v a 2 5 2.2f 3300pf npo v in 1v/div v a 1v/div v out 1v/div 200ns/div 6210 f04 s i m pli f ie d s che m a t ic ?in 8k i set 4 out 1 5 v ? 2 v + 6 supply current control 600 600 6210 ss v + v ? output bias control +in 3
lt6210/lt6211 15 62101fc p ackage descrip t ion dd package 10-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1699 rev c) 3.00 0.10 (4 sides) note: 1. drawing to be made a jedec package outline m0-229 variation of (weed-2). check the ltc website data sheet for current status of variation assignment 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom view?exposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.125 typ 2.38 0.10 (2 sides) 1 5 10 6 pin 1 top mark (see note 6) 0.200 ref 0.00 ? 0.05 (dd) dfn rev c 0310 0.25 0.05 2.38 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.15 0.05 0.50 bsc 0.70 0.05 3.55 0.05 package outline 0.25 0.05 0.50 bsc dd package 10-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1699 rev c) pin 1 notch r = 0.20 or 0.35 45 chamfer
lt6210/lt6211 16 62101fc p ackage descrip t ion s6 package 6-lead plastic tsot-23 (reference ltc dwg # 05-08-1636) ms package 10-lead plastic msop (reference ltc dwg # 05-08-1661 rev e) msop (ms) 0307 rev e 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 ?0.27 (.007 ? .011) typ 0.86 (.034) ref 0.50 (.0197) bsc 1 2 3 4 5 4.90 0.152 (.193 .006) 0.497 0.076 (.0196 .003) ref 8910 7 6 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.254 (.010) 0 ? 6 typ detail ?a? detail ?a? gauge plane 5.23 (.206) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.305 0.038 (.0120 .0015) typ 0.50 (.0197) bsc 0.1016 0.0508 (.004 .002) 1.50 ? 1.75 (note 4) 2.80 bsc 0.30 ? 0.45 6 plcs (note 3) datum ?a? 0.09 ? 0.20 (note 3) s6 tsot-23 0302 rev b 2.90 bsc (note 4) 0.95 bsc 1.90 bsc 0.80 ? 0.90 1.00 max 0.01 ? 0.10 0.20 bsc 0.30 ? 0.50 ref pin one id note: 1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193 3.85 max 0.62 max 0.95 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref
lt6210/lt6211 17 62101fc information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. r evision h is t ory rev date description page number c 3/11 revised the tape and reel part numbers and temperature ranges in the order information section. 2 (revision history begins at rev c)
lt6210/lt6211 18 62101fc linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com linear technology corporation 2003 lt 0311 rev c ? printed in usa r ela t e d p ar t s typical a pplica t ion part number description comments LT1252/lt1253/lt1254 100mhz low cost video amplifers single, dual and quad current feedback amplifers lt1395/lt1396/lt1397 400mhz, 800v/s amplifers single, dual and quad current feedback amplifers lt1398/lt1399 300mhz amplifers with shutdown dual and triple current feedback amplifers lt1795 50mhz, 500ma programmable i s amplifer dual current feedback amplifer lt1806/lt1807 325mhz, 140v/s rail-to-rail i/o amplifers single and dual voltage feedback amplifers lt1815/lt1816/lt1817 220mhz, 1500v/s programmable i s operational amplifer single, dual and quad voltage feedback amplifers figure 5. line driver with low power mode figure 6. frequency response for full speed and low power mode line driver with power saving mode in applications where low distortion or high slew rate are desirable but not necessary at all times, it may be possible to decrease the lt6210 or lt6211s quiescent current when the higher power performance is not required. figure 5 illustrates a method of setting quiescent current with a fet switch. in the 5v dual supply case pictured, shorting the i set pin through an effective 20k to ground sets the supply current to 6ma, while the 240k resistor at the i set pin with the fet turned off sets the supply current to ap- proximately 1ma. the feedback resistor of 4.02k is selected to minimize peaking in low power mode. the bandwidth of the lt6210 in this circuit increases from about 40mhz in low power mode to over 200mhz in full speed mode, as illustrated in figure 6. other ac specs also improve signifcantly at the higher current setting. the following table shows harmonic distortion at 1mhz with a 2v p-p sinusoid at the two selected current levels. harmonic distortion low power full speed hd2 C53dbc hd2 C68dbc hd3 C46dbc hd3 C77dbc ? + lt6210 r1 240k r2 22k r load 150 v out 6210 f05 ?5v r3 4.02k hs/lp v in 5v 4 5 2 6 1 3 2n7002 frequency (mhz) ?4 amplitude (db) ?2 ?1 1 3 0 10 100 1000 6210 f06 ?6 1 0 ?3 ?5 2 full speed mode i s = 6ma low power mode i s = 1ma t a = 25c v out = 100mv p-p

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